ARM64 port
by A. Wilcox
Hi all,
Packet.net has generously sponsored hardware to make our ARM64 port a
reality. We now need to discuss what optimisations and minimum
architecture we want to have for our ARM64 port.
My personal preference would be:
-O2
=> I think that even on the SoCs, memory is not so cramped that speed
should be sacrificed in the name of -Os. More than likely, people
running on SoCs will have swap anyway if they really need it, and with
uksm and musl it should already have better memory characteristics than
Raspbian et al.
-mfix-cortex-a53-835769
=> Work around a CPU erratum in the A53 core. This is the CPU used in
the RPi3, Pine A64, Roku, odroid-C2, and some Snapdragons.
-mfix-cortex-a53-843419
=> Likewise.
-mcpu=armv8-a
=> Generic, all ARMv8 cores are supported.
-mtune=cortex-a53
=> This will make the code run a little faster on these CPUs, at the
expense of potentially running slightly slower on ThunderX, XGene, and
Exynos. I don't think we will ever have any Exynos chips and if we went
with -mtune=generic it would be slower on ThunderX than -mtune=thunderx
anyway. Using A53 as our tune target will give us a small perf boost
where, in my humble opinion, we need it most: the tiny SoCs.
Note for -mtune, quoting the GCC manual:
> -mtune=name
> Specify the name of the target processor for which GCC
> should tune the performance of the code. Permissible values for this
> option are: generic, cortex-a35, cortex-a53, cortex-a57, cortex-a72,
> exynos-m1, qdf24xx, thunderx, xgene1.
Once we have set up the build settings, it will be officially tier 3
(experimental). I am hoping since this donated build hardware is 96
cores, we will be able to bring it to tier 2 very quickly.
Regards,
--arw
--
A. Wilcox (awilfox)
Project Lead, Adélie Linux
http://adelielinux.org
2 years, 11 months