4:50 a.m.
On 05/23/18 20:13, A. Wilcox wrote:
-O2
I still feel this is the best way forward.
-mfix-cortex-a53-835769
-mfix-cortex-a53-843419
smaeul mentioned on IRC that there is a way to have GCC apply these
workarounds without specifying them in the CFLAGS of abuild:
https://code.foxkit.us/smaeul/packages/commit/de753cd5
I am going to integrate this change into our gcc build.
-mcpu=armv8-a
-mtune=cortex-a53
smaeul also mentioned that he is using these flags on his prototype
aarch64 port of Adélie. I have a mini-chroot running on the builder now
using his bootstrap packages and it seems to work fine.
Once we have set up the build settings, it will be officially tier 3
(experimental). I am hoping since this donated build hardware is 96
cores, we will be able to bring it to tier 2 very quickly.
This letter, then, serves as the official notice that aarch64 is tier 3.
Best,
--arw
--
A. Wilcox (awilfox)
Project Lead, Adélie Linux
http://adelielinux.org